Icon class icon_class fas fa-quote-left icon_class_computed fas fa-quote-left Related content BDD: Figure 40: Circuit constraint blocks Source SysPhS-1.1 Copyright information About Object Management Group copyright in text extracts quoted from OMG specifications for educational purposes Snippet kind INFO UML keywords Constraint SysML keywords constraint parameter ConstraintBlock Block Keywords SysPhS Previous snippet The constraints for the resistor, capacitor, and inductor specify the voltage/current relationship with resistance, capacitance, and inductance, respectively. Full quote The ground constraint specifies that the voltage at the ground pin is zero. Next snippet The source constraint defines the voltage across it as a sine wave with the parameter amp as its amplitude. Related snippets Equations define mathematical relationships between the values of numeric variables. Equations in SysML, are constraints in constraint blocks that use properties of the blocks (parameters) as variables. In this example, a constraint block BinaryElectricalComponentConstraint defines parameters and constraints common to resistors, inductors, capacitors, and sources, as shown in Figure 40. These specify that the voltage v across the component is equal to the difference between the voltage at the positive and negative pins. The current i through the component is equal to the current going through the positive pin. The current i through the component is equal to the current going through the positive pin. The sum of the current going through the two pins adds up to zero (one is the negative of the other), because the components do not create, destroy, or store charge. The constraints for the resistor, capacitor, and inductor specify the voltage/current relationship with resistance, capacitance, and inductance, respectively. Related snippets (backlinks) The source constraint defines the voltage across it as a sine wave with the parameter amp as its amplitude. Visit also Visit also (backlinks) Flags
